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<title>MTB CAT1 Peripheral driver library: Protocol Status Register (PSR) masks</title>
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<div class="header">
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<a href="#define-members">Macros</a>  </div>
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<div class="title">Protocol Status Register (PSR) masks<div class="ingroups"><a class="el" href="group__group__canfd.html">CAN FD       (CAN with Flexible Data-Rate)</a> &raquo; <a class="el" href="group__group__canfd__macros.html">Macros</a></div></div>  </div>
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<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<p>Masks and bit positions of the Protocol Status Register (PSR) fields. </p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:gacd342625533d7082e9fd47688b738604"><td class="memItemLeft" align="right" valign="top"><a id="gacd342625533d7082e9fd47688b738604"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#gacd342625533d7082e9fd47688b738604">CY_CANFD_PSR_LEC_POS</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_LEC_Pos )</td></tr>
<tr class="memdesc:gacd342625533d7082e9fd47688b738604"><td class="mdescLeft">&#160;</td><td class="mdescRight">Last Error Code position. <br /></td></tr>
<tr class="separator:gacd342625533d7082e9fd47688b738604"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab0c4831c1cc8ed74fd67600a27c6afd5"><td class="memItemLeft" align="right" valign="top"><a id="gab0c4831c1cc8ed74fd67600a27c6afd5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#gab0c4831c1cc8ed74fd67600a27c6afd5">CY_CANFD_PSR_LEC_MASK</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_LEC_Msk )</td></tr>
<tr class="memdesc:gab0c4831c1cc8ed74fd67600a27c6afd5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Last Error Code bit mask. <br /></td></tr>
<tr class="separator:gab0c4831c1cc8ed74fd67600a27c6afd5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8986040082ce694751e24b77b449e75"><td class="memItemLeft" align="right" valign="top"><a id="gac8986040082ce694751e24b77b449e75"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#gac8986040082ce694751e24b77b449e75">CY_CANFD_PSR_ACT_POS</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_ACT_Pos )</td></tr>
<tr class="memdesc:gac8986040082ce694751e24b77b449e75"><td class="mdescLeft">&#160;</td><td class="mdescRight">Activity position. <br /></td></tr>
<tr class="separator:gac8986040082ce694751e24b77b449e75"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8075668ffb81e781ecd1dd280f6c9c01"><td class="memItemLeft" align="right" valign="top"><a id="ga8075668ffb81e781ecd1dd280f6c9c01"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#ga8075668ffb81e781ecd1dd280f6c9c01">CY_CANFD_PSR_ACT_MASK</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_ACT_Msk )</td></tr>
<tr class="memdesc:ga8075668ffb81e781ecd1dd280f6c9c01"><td class="mdescLeft">&#160;</td><td class="mdescRight">Activity bit mask. <br /></td></tr>
<tr class="separator:ga8075668ffb81e781ecd1dd280f6c9c01"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0d51ec009b2987c7558270e54666ca4a"><td class="memItemLeft" align="right" valign="top"><a id="ga0d51ec009b2987c7558270e54666ca4a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#ga0d51ec009b2987c7558270e54666ca4a">CY_CANFD_PSR_EP</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_EP_Msk  )</td></tr>
<tr class="memdesc:ga0d51ec009b2987c7558270e54666ca4a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Error Passive. <br /></td></tr>
<tr class="separator:ga0d51ec009b2987c7558270e54666ca4a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga87db555358d69c3db60a3eaa46f37706"><td class="memItemLeft" align="right" valign="top"><a id="ga87db555358d69c3db60a3eaa46f37706"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#ga87db555358d69c3db60a3eaa46f37706">CY_CANFD_PSR_EW</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_EW_Msk  )</td></tr>
<tr class="memdesc:ga87db555358d69c3db60a3eaa46f37706"><td class="mdescLeft">&#160;</td><td class="mdescRight">Warning Status. <br /></td></tr>
<tr class="separator:ga87db555358d69c3db60a3eaa46f37706"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae4710bab3456b5cd178d0f6ce983bc48"><td class="memItemLeft" align="right" valign="top"><a id="gae4710bab3456b5cd178d0f6ce983bc48"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#gae4710bab3456b5cd178d0f6ce983bc48">CY_CANFD_PSR_BO</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_BO_Msk  )</td></tr>
<tr class="memdesc:gae4710bab3456b5cd178d0f6ce983bc48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus_Off Status. <br /></td></tr>
<tr class="separator:gae4710bab3456b5cd178d0f6ce983bc48"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf58fd33f6031328ee7ccfb8cdd0b2ed4"><td class="memItemLeft" align="right" valign="top"><a id="gaf58fd33f6031328ee7ccfb8cdd0b2ed4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#gaf58fd33f6031328ee7ccfb8cdd0b2ed4">CY_CANFD_PSR_DLEC_POS</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_DLEC_Pos)</td></tr>
<tr class="memdesc:gaf58fd33f6031328ee7ccfb8cdd0b2ed4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Phase Last Error Code position. <br /></td></tr>
<tr class="separator:gaf58fd33f6031328ee7ccfb8cdd0b2ed4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0532d99f8a9d868bbb198f64c863252"><td class="memItemLeft" align="right" valign="top"><a id="gad0532d99f8a9d868bbb198f64c863252"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#gad0532d99f8a9d868bbb198f64c863252">CY_CANFD_PSR_DLEC_MASK</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_DLEC_Msk)</td></tr>
<tr class="memdesc:gad0532d99f8a9d868bbb198f64c863252"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Phase Last Error Code bit mask. <br /></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#ga21c8218edcaa3e1b8060e7d13fdf46bc">CY_CANFD_PSR_RESI</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_RESI_Msk)</td></tr>
<tr class="memdesc:ga21c8218edcaa3e1b8060e7d13fdf46bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">ESI flag of last received CAN FD Message. <br /></td></tr>
<tr class="separator:ga21c8218edcaa3e1b8060e7d13fdf46bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga669f35d1033f0c144f4935b3176f5f32"><td class="memItemLeft" align="right" valign="top"><a id="ga669f35d1033f0c144f4935b3176f5f32"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#ga669f35d1033f0c144f4935b3176f5f32">CY_CANFD_PSR_RBRS</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_RBRS_Msk)</td></tr>
<tr class="memdesc:ga669f35d1033f0c144f4935b3176f5f32"><td class="mdescLeft">&#160;</td><td class="mdescRight">BRS flag of last received CAN FD Message. <br /></td></tr>
<tr class="separator:ga669f35d1033f0c144f4935b3176f5f32"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#ga2b6080fe8714f20a3fa755dce54f59e2">CY_CANFD_PSR_RFDF</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_RFDF_Msk)</td></tr>
<tr class="memdesc:ga2b6080fe8714f20a3fa755dce54f59e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Received a CAN FD Message. <br /></td></tr>
<tr class="separator:ga2b6080fe8714f20a3fa755dce54f59e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga593b1a270627792f4266bd71c2a8a792"><td class="memItemLeft" align="right" valign="top"><a id="ga593b1a270627792f4266bd71c2a8a792"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#ga593b1a270627792f4266bd71c2a8a792">CY_CANFD_PSR_PXE</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_PXE_Msk )</td></tr>
<tr class="memdesc:ga593b1a270627792f4266bd71c2a8a792"><td class="mdescLeft">&#160;</td><td class="mdescRight">Protocol Exception Event. <br /></td></tr>
<tr class="separator:ga593b1a270627792f4266bd71c2a8a792"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9af5474f2cfc7cdb2655455b16f4e54c"><td class="memItemLeft" align="right" valign="top"><a id="ga9af5474f2cfc7cdb2655455b16f4e54c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#ga9af5474f2cfc7cdb2655455b16f4e54c">CY_CANFD_PSR_TDCV_POS</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_TDCV_Pos)</td></tr>
<tr class="memdesc:ga9af5474f2cfc7cdb2655455b16f4e54c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transmitter Delay Compensation Value position. <br /></td></tr>
<tr class="separator:ga9af5474f2cfc7cdb2655455b16f4e54c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c95e56f75cd97df21fc56dcae7d6bef"><td class="memItemLeft" align="right" valign="top"><a id="ga7c95e56f75cd97df21fc56dcae7d6bef"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__canfd__last__state__masks.html#ga7c95e56f75cd97df21fc56dcae7d6bef">CY_CANFD_PSR_TDCV_MASK</a>&#160;&#160;&#160;(CANFD_CH_M_TTCAN_PSR_TDCV_Msk)</td></tr>
<tr class="memdesc:ga7c95e56f75cd97df21fc56dcae7d6bef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transmitter Delay Compensation Value bit mask. <br /></td></tr>
<tr class="separator:ga7c95e56f75cd97df21fc56dcae7d6bef"><td class="memSeparator" colspan="2">&#160;</td></tr>
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